In semiconductor integrated circuit devices (LSIs) requiring high levels of security, there is a fear that physical alterations might be made to circuits thereof and thereby provide change in operations of the devices, leakage of confidential information in the devices, or other disadvantages. This fear poses a serious threat to the devices.
The alterations mentioned above are generally made in such a manner that using a focused ion beam (FIB) apparatus, an upper portion of an LSI is radiated with ion beams to cut interconnection lines of the LSI and to deposit metal for use in interconnection, and that a piece of the cut interconnection line is electrically connected to another interconnection line located around the cut interconnection line.
Hereinafter, a conventional semiconductor integrated circuit device provided with shield lines will be described with reference to FIG. 13.
Referring to FIG. 13, a semiconductor substrate 201 is formed with a MOS transistor 202. On the MOS transistor 202, a first insulating film 203 is formed which covers the MOS transistor 202. The first insulating film 203 is formed with a first LSI interconnection line 204 and a second LSI interconnection line 205, and a second insulating film 206 is formed on the first insulating film 203. The semiconductor substrate 201, the MOS transistor 202, the first insulating film 203, the first LSI interconnection line 204, the second LSI interconnection line 205, and the second insulating film 206 are collectively called an LSI function unit 207.
Over the LSI function unit 207, a lower-layer shield line 211, a third insulating film 212, an upper-layer shield line 213, and a fourth insulating film 214 are sequentially formed from bottom up. The lower-layer shield line 211, the third insulating film 212, the upper-layer shield line 213, and the fourth insulating film 214 constitute a shield wiring layer 215 for the LSI.
Since physical alterations to circuits of the device are typically made from the upper side of the LSI, that is, from the opposite side of the LSI to the semiconductor substrate 201, the new shield wiring layer 215 is provided on the LSI function unit 207. With this construction, it is impossible to alter the circuits without removing the upper- and lower-layer shield lines 213 and 211, which makes it more difficult to accomplish alteration.
However, current FIB apparatuses have very high performances, so that it is relatively easy to remove these shield lines 211 and 213 and alter the circuits. As a solution to this problem, for example, PCT International Patent Publication No. WO 00/28399 A1 illustrates a method in which an LSI is provided with a function for detecting alteration to a shield wiring layer, and in the case of detecting alteration, the altered LSI is still kept in a safe condition.
While the LSI is operating, the potentials of the lower- and upper-layer shield lines 211 and 213 are fixed at predetermined voltage levels. During this operation, parasitic capacitances are produced between each of the shield lines 211 and 213 and each of the LSI interconnection lines 204 and 205, which causes delays in signal propagation.
Further, as shown in FIG. 13, the shield lines 211 and 213 are formed in parallel with each other, that is, to extend in the same direction. Therefore, an LSI interconnection line arranged in parallel with the shield lines 211 and 213, such as the second LSI interconnection line 205, has an increased parasitic capacitance, while an LSI interconnection line arranged in perpendicular to the shield lines 211 and 213, such as the first LSI interconnection line 204, has a decreased parasitic capacitance. Thus, the differently arranged (laid) directions of the LSI interconnection lines 204 and 205 create imbalances in signal delay time, which causes a problem that LSI layout design becomes extremely difficult. Moreover, such a construction causes another problem that alteration to interconnection lines using an FIB apparatus is facilitated.
As a still another problem, if physical analysis were conducted on the shield wiring layer 215 itself, the electrical connection relationship in the shield wiring layer 215 would be revealed.